SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 87
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SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
- Current page: 87 of 470
- Download datasheet (6Mb)
Multiply/Divide High Register MDH
This register is part of the 32-bit multiply/divide register which is implicitly used by the
CPU when it performs a multiplication or a division. After a multiplication, this non-bit
addressable register represents the high order 16 bits of the 32-bit result. For long
divisions, the MDH register must be loaded with the high order 16 bits of the 32-bit
dividend before the division is started. After any division, register MDH represents the
16-bit remainder.
MDH
Multiply/Divide High Reg.
Bit
mdh
Whenever this register is updated via software, the Multiply/Divide Register In Use
(MDRIU) flag in the Multiply/Divide Control register (MDC) is set to ‘1’.
When a multiplication or division is interrupted before its completion and when a new
multiply or divide operation is to be performed within the interrupt service routine, register
MDH must be saved along with registers MDL and MDC to avoid erroneous results.
A detailed description of how to use the MDH register for programming multiply and
divide algorithms can be found in
User’s Manual
15
14
13
Function
Specifies the high order 16 bits of the 32-bit multiply and divide reg. MD.
12
11
10
Chapter
SFR (FE0C
9
8
mdh
4-30
rwh
22.
7
H
/06
H
6
)
Central Processing Unit (CPU)
5
4
Reset Value: 0000
C164CM/C164SM
3
2
Derivatives
V1.0, 2002-02
1
0
H
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