SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 34

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

C164CM/C164SM
Derivatives
Architectural Overview
General Purpose Timer (GPT) Unit
The GPT1 unit utilizes a very flexible multifunctional timer/counter structure which may
be used for many different time related tasks such as event timing and counting, pulse
width and duty cycle measurements, pulse generation, or pulse multiplication.
Each timer may operate independently in a number of different modes, or may be
concatenated with another timer of the same module.
Each timer can be configured individually for one of four basic modes of operation:
Timer, Gated Timer, Counter Mode, and Incremental Interface Mode. In Timer Mode, the
input clock for a timer is derived from the internal CPU clock divided by a programmable
prescaler, while Counter Mode allows a timer to be clocked in reference to external
events (via TxIN).
Pulse width or duty cycle measurement is supported in Gated Timer Mode where the
operation of a timer is controlled by the ‘gate’ level on its external input pin TxIN.
In Incremental Interface Mode, the GPT1 timers can be directly connected to the
incremental position sensor signals A and B via the respective inputs TxIN and TxEUD.
Direction and count signals are internally derived from these two input signals, so, the
contents of timer Tx corresponds to the sensor position. The third position sensor signal
TOP0 can be connected to an interrupt input.
The count direction (up/down) for each timer is programmable by software or may
additionally be altered dynamically by an external signal (TxEUD) to facilitate tasks such
as position tracking.
The core timer T3 has an output toggle latch (T3OTL) which changes its state on each
timer overflow/underflow. The state of this latch may be used internally to concatenate
the core timer with the respective auxiliary timers resulting in 32/33-bit timers/counters
for measuring long time periods with high resolution.
Various reload or capture functions can be selected to reload timers or capture a timer’s
contents triggered by an external signal or a selectable transition of toggle latch T3OTL.
The maximum resolution of the timers in module GPT1 is 8 CPU clock cycles (= 16 TCL).
User’s Manual
2-17
V1.0, 2002-02