SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 217

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

Bit
S0PE
S0FE
S0OE
S0ODD
S0BRS
S0LB
S0R
A transmission is started by writing to the Transmit Buffer register S0TBUF (via an
instruction or a PEC data transfer). The number of data bits to be actually transmitted is
determined by the operating mode selected; that is, bits written to positions 9 through 15
of register S0TBUF are always insignificant. After a transmission has been completed,
the transmit buffer register is cleared to 0000
Data transmission is double-buffered so that a new character may be written to the
transmit buffer register before the transmission of the previous character is complete.
This allows the transmission of characters back-to-back without gaps.
Data reception is enabled by the Receiver Enable Bit S0REN. After reception of a
character has been completed, the received data and if provided by the selected
operating mode the received parity bit can be read from the (read-only) Receive Buffer
register S0RBUF. Bits in the upper half of S0RBUF not valid in the selected operating
mode will be read as zeros.
Data reception is double-buffered so that reception of a second character may begin
before the previously received character has been read out of the receive buffer register.
In all modes, receive buffer overrun error detection can be selected through bit S0OEN.
User’s Manual
Function
Parity Error Flag
Set by hardware on a parity error (S0PEN = ‘1’). Must be reset by
software.
Framing Error Flag
Set by hardware on a framing error (S0FEN = ‘1’). Must be reset by
software.
Overrun Error Flag
Set by hardware on an overrun error (S0OEN = ‘1’). Must be reset by
software.
Parity Selection Bit
0:
1:
Baudrate Selection Bit
0:
1:
Loopback Mode Enable Bit
0:
1:
Baudrate Generator Run Bit
0:
1:
Even parity (parity bit set on odd number of ‘1’s in data)
Odd parity (parity bit set on even number of ‘1’s in data)
Divide clock by reload-value + constant (depending on mode)
Additionally reduce serial clock to 2/3
Standard transmit/receive mode
Loopback mode enabled
Baudrate generator disabled (ASC0 inactive)
Baudrate generator enabled
Asynchronous/Synchronous Serial Interface
11-3
H
.
C164CM/C164SM
Derivatives
V1.0, 2002-02