SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 214
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SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
- Current page: 214 of 470
- Download datasheet (6Mb)
10.1.3
When a timer overflows from FFFF
0000
register TxIC will be set. This will cause an interrupt to the respective timer interrupt
vector (T2INT, T3INT or T4INT) or will trigger a PEC service, if the respective interrupt
enable bit (T2IE, T3IE or T4IE in register TxIC) is set. There is an interrupt control
register for each of the three timers.
T2IC
Timer 2 Intr. Ctrl. Reg.
T3IC
Timer 3 Intr. Ctrl. Reg.
T4IC
Timer 4 Intr. Ctrl. Reg.
Note: Please refer to the general Interrupt Control Register description for an
User’s Manual
15
15
15
-
-
-
H
explanation of the control fields.
14
14
14
to FFFF
-
-
-
Interrupt Control for GPT1 Timers
13
13
13
-
-
-
H
12
12
12
(counting down), its interrupt request flag (T2IR, T3IR or T4IR) in
-
-
-
-
-
-
11
11
11
-
-
-
10
10
10
-
-
-
SFR (FF60
SFR (FF62
SFR (FF64
H
9
9
9
-
-
-
to 0000
8
8
8
-
-
-
10-20
T2IR T2IE
T3IR T3IE
T4IR T4IE
H
rwh
rwh
rwh
H
7
H
7
H
7
(counting up), or when it underflows from
/B0
/B1
/B2
H
H
H
rw
rw
rw
6
6
6
)
)
)
5
5
5
General Purpose Timer Unit
4
4
4
ILVL
ILVL
ILVL
rw
rw
rw
Reset Value: - - 00
Reset Value: - - 00
Reset Value: - - 00
C164CM/C164SM
3
3
3
2
2
2
Derivatives
V1.0, 2002-02
1
1
1
GLVL
GLVL
GLVL
rw
rw
rw
0
0
0
H
H
H
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