SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 192
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SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
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9.5
When the external bus interface is enabled, but no external access is currently executed,
the EBC is idle. As long as only internal resources (from an architecture point of view)
such as IRAM, GPRs or SFRs, etc. are used, the external bus interface does not change
(see
Accesses to on-chip X-Peripherals are also controlled by the EBC. However, even
though an X-Peripheral appears like an external peripheral to the controller, the
respective accesses do not generate valid external bus cycles.
Due to timing constraints, address and write data of an XBUS cycle are reflected on the
external bus interface (see
and ALE which also pulses for an XBUS cycle.
The external control signals (RD and WR) remain inactive (high).
Table 9-4
Pins
PORT0
PORT1
ALE
RD
WR
1)
User’s Manual
Used and driven in visible mode.
Table
Internal Accesses only
Tristated (floating)
Last used external address
(if used for the bus interface)
Inactive (low)
Inactive (high)
Inactive (high)
EBC Idle State
9-4).
Status Of The External Bus Interface During EBC Idle State
Table
9-4). The “address” mentioned above includes PORT1
9-23
XBUS Accesses
Tristated (floating) for read accesses
XBUS write data for write accesses
Last used XBUS address
(if used for the bus interface)
Inactive (high)
Inactive (high)
Pulses as defined for X-Peripheral
External Bus Interface
1)
1)
C164CM/C164SM
Derivatives
V1.0, 2002-02
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