SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 238

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SAF-C164SM

Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
12.1
The various devices are connected through three lines. The definition of these lines is
always determined by the master: The line connected to the master’s data output pin
MTSR is the transmit line, the receive line is connected to its data input line MRST, and
the clock line is connected to pin SCLK. Only the device selected for master operation
generates and outputs the serial clock on pin SCLK. All slaves receive this clock, so their
pin SCLK must be switched to input mode (DP0H.7 = ‘0’). The output of the master’s shift
register is connected to the external transmit line, which in turn is connected to the
slaves’ shift register input. The output of the slaves’ shift register is connected to the
external receive line in order to enable the master to receive the data shifted out of the
slave. The external connections are hard-wired, the function and direction of these pins
are determined by the master or slave operation of the individual device.
Note: The shift direction shown in
When initializing the devices in this configuration, select one device for master operation
(SSCMS = ‘1’); all others must be programmed for slave operation (SSCMS = ‘0’).
Initialization includes the operating mode of the device’s SSC and also the function of
the respective port lines (see
Figure 12-4 SSC Full-Duplex Configuration
User’s Manual
Master
for LSB-first operation.
Shift Register
Full-Duplex Operation
Clock
Device #1
MTSR
SCLK
MRST
Chapter
Figure 12-4
Receive
Clock
Transmit
12.4).
12-7
High-Speed Synchronous Serial Interface
applies for MSB-first operation as well as
Device #2
Device #3
MTSR
MTSR
SCLK
SCLK
MRST
MRST
C164CM/C164SM
Clock
Clock
Shift Register
Shift Register
Derivatives
V1.0, 2002-02
MCS01963
Slave
Slave

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