SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 70
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
- Current page: 70 of 470
- Download datasheet (6Mb)
System Configuration Register SYSCON
This bit-addressable register provides general system configuration and control
functions. The reset value for register SYSCON depends on the state of the PORT0 pins
during reset (see hardware effectable bits).
SYSCON
System Control Register
Bit
VISIBLE
XPEN
BDRSTEN
OWDDIS
CLKEN
ROMEN
User’s Manual
15
STKSZ
14
rw
13
Function
Visible Mode Control
0:
1:
XBUS Peripheral Enable Bit
0:
1:
Bidirectional Reset Enable Bit
0:
1:
Oscillator Watchdog Disable Bit
0:
1:
System Clock Output Enable (CLKOUT)
0:
1:
Internal ROM Enable (Set according to pin EA during reset)
0:
1:
ROM
S1
12
rw
Accesses to XBUS peripherals are done internally
XBUS peripheral accesses are made visible on the external pins
Accesses to the on-chip X-Peripherals and their functions are
disabled
The on-chip X-Peripherals are enabled and can be accessed
Pin RSTIN is an input only
Pin RSTIN is pulled low during the internal reset sequence
after any reset
The on-chip oscillator watchdog is enabled and active
The on-chip oscillator watchdog is disabled and the CPU clock is
always fed from the oscillator input
CLKOUT disabled: pin may be used for general purpose IO or
for signal FOUT
CLKOUT enabled: pin outputs the system clock signal
Internal program memory disabled,
accesses to the ROM area use the external bus
Internal program memory enabled
SGT
DIS
11
rw
ROM
rwh
EN
10
SFR (FF12
9
-
-
CLK
EN
rw
8
4-13
7
H
-
-
/89
H
6
-
-
)
Central Processing Unit (CPU)
5
-
-
OWD
DIS
rwh
4
RST
Reset Value: 0XX0
BD
C164CM/C164SM
EN
rw
3
XPEN VISI-
rw
2
Derivatives
V1.0, 2002-02
BLE
rw
1
0
-
-
H
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