SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 34

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SPAKDSP303AG100

Manufacturer Part Number
SPAKDSP303AG100
Description
IC DSP 24BIT 100MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of SPAKDSP303AG100

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
24KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SPAKDSP303AG100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Signals/Connections
2-10
H[0–7]
HAD[0–7]
PB[0–7]
HA0
HAS
PB8
HA1
HA8
PB9
Signal Name
/HAS
Input/Output
Input/Output
Input or
Input or
Input or
Output
Output
Output
Type
Input
Input
Input
Input
State During
Ignored input
Ignored input
Ignored input
Reset
1,2
Table 2-11. Host Interface
DSP56303 User’s Manual, Rev. 2
Host Data
When the HI08 is programmed to interface with a non-multiplexed host
bus and the HI function is selected, these signals are lines 0–7 of the Data
bus.
Host Address
When the HI08 is programmed to interface with a multiplexed host bus
and the HI function is selected, these signals are lines 0–7 of the
Address/Data bus.
Port B 0–7
When the HI08 is configured as GPIO through the HPCR, these signals
are individually programmed through the HI08 Data Direction Register
(HDDR). This input is 5 V tolerant.
Host Address Input 0
When the HI08 is programmed to interface with a non-multiplexed host
bus and the HI function is selected, this signal is line 0 of the Host
Address bus.
Host Address Strobe
When the HI08 is programmed to interface with a multiplexed host bus
and the HI function is selected, this signal is the Host Address Strobe
(HAS) Schmitt-trigger input. The polarity of the address strobe is
programmable, but is configured active-low (
Port B 8
When the HI08 is configured as GPIO through the HPCR, this signal is
individually programmed through the HDDR. This input is 5 V tolerant.
Host Address Input 1
When the HI08 is programmed to interface with a non-multiplexed host
bus and the HI function is selected, this signal is line 1 of the Host
Address bus.
Host Address 8
When the HI08 is programmed to interface with a multiplexed host bus
and the HI function is selected, this signal is line 8 of the Host Address
bus.
Port B 9
When the HI08 is configured as GPIO through the HPCR, this signal is
individually programmed through the HDDR. This input is 5 V tolerant.
Signal Description
HAS
Freescale Semiconductor
) following reset.

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