SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 225

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SPAKDSP303AG100

Manufacturer Part Number
SPAKDSP303AG100
Description
IC DSP 24BIT 100MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of SPAKDSP303AG100

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
24KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SPAKDSP303AG100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
; The program words will be stored in contiguous PRAM memory locations
; starting at the specified starting address.
; After reading the program words, program execution starts from the same
; address where loading started.
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0). This will start execution of the loaded program from
; the specified starting address.
;
; The base address of the HI08 in multiplexed mode is 0x80 and is not modified
; by the bootstrap code. All the address lines are enabled and should be
; connected accordingly.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; If MC:MB:MA=111, then it loads the program RAM from the Host
; Interface programmed to operate in the MC68302 bus mode,
; in single-strobe pin configuration.
; The HOST MC68302 bootstrap code expects accesses that are byte wide.
; The HOST MC68302 bootstrap code expects to read 3 bytes forming a 24-bit word
; specifying the number of program words, 3 bytes forming a 24-bit word
; specifying the address to start loading the program words and then 3 bytes
; forming 24-bit words for each program word to be loaded.
; The program words will be stored in contiguous PRAM memory locations
; starting at the specified starting address.
; After reading the program words, program execution starts from the same
; address where loading started.
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0). This will start execution of the loaded program from
; the specified starting address.
;
BOOT
AARV
M_SSR
M_STXL
M_SRXL
M_SCCR
M_SCR
M_PCRE
M_AAR1
M_HPCR
M_HSR
M_HRX
HRDF
HF0
HEN
Freescale Semiconductor
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ORG PL: $ff0000,PL:$ff0000; bootstrap code starts at $ff0000
$FFFFC4 ; Host Polarity Control Register
$FFFFC3; Host Status Register
$FFFFC6; Host Receive Register
$0; Host Receive Data Full
$3; Host Flag 0
$6; Host Enable
$D00000
$D00409; AAR1 selects the EPROM as CE~
$FFFF93 ; SCI Status Register
$FFFF95; SCI Transmit Data Register (low)
$FFFF98 ; SCI Receive Data Register (low)
$FFFF9B; SCI Clock Control Register
$FFFF9C; SCI Control Register
$FFFF9F
$FFFFF8
; mapped as P from $D00000 to
; EPROM would be located
; $DFFFFF, active low
; where the external byte-wide
; Port E Control register
; this is the location in P memory
; on the external memory bus
; Address Attribute Register 1
DSP56303 User’s Manual, Rev. 2
Bootstrap Code
A-3

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