SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 287

• Manufacturer Part Number: SPAKDSP303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of SPAKDSP303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

peripherals programming
PINIT 4-20
PLL 1-8
PLL Control (PCTL) register 4-20
PLL Enable (PEN) bit 4-20
PLL Stop State (PSTP) bit 4-20
polling 5-2
Port A 2-5
Port B 2-2
Port C 2-2
Port C Control Register (PCRC) 7-33
Port C Data Register (PDRC) 7-34
Port C Direction Register (PRRC) 7-34
Port D 2-2
Port D Control Register (PCRD) 7-33
Port D Data Register (PDRD) 7-34
Port D Direction Register (PRRD) 7-34
Port E 2-17
Port E Control Register (PCRE) 8-22
Port E Data Register (PDRE) 8-23
Port E Direction Register (PRRE) 8-22
Freescale Semiconductor
bit-oriented instructions 5-1
data transfer methods 5-2
guidelines 5-1
individual reset state 5-1
initialization steps 5-1
interrupts 5-2
mapping control registers 5-1
move (MOVE, MOVEP) instructions 5-1
polling 5-2
reading status registers 5-2
Clock Output Disable (COD) 4-20
Crystal Range (XTLR) 4-21
Division Factor (DF) 4-21
PLL Enable (PEN) 4-20
PLL Multiplication Factor (MF) 4-21
PLL Stop State (PSTP) 4-20
Predivider Factor (PD) 4-20
programming sheet B-13
XTAL Disable (XTLD) 4-20
HI08 5-6
programming sheet B-31
control registers 7-33
ESSI0 5-7
programming sheet B-32
programming sheet B-32
programming sheet B-32
control registers 7-33
ESSI1 5-7
programming sheet B-33
programming sheet B-33
programming sheet B-33
programming sheet B-34
programming sheet B-34
programming sheet B-34
,
2-4
,
,
,
,
2-12
2-15
4-21
5-7
,
2-16
DSP56303 User’s Manual, Rev. 2
position independent code (PIC) 1-8
power 2-3
Predivider Factor (PD) bits 4-20
prescale divider for ESSI 7-15
Prescale Modulus Select (PM) bits 7-15
Prescaler Clock Enable (PCE) bit 9-24
prescaler counter 9-21
Prescaler Counter Value (PC) bits 9-23
Prescaler Preload Value (PL) bits 9-23
Prescaler Range (PSR) bit 7-15
Prescaler Source (PS) bits 9-23
Program Address Bus (PAB) 1-10
Program Address Generator (PAG) 1-7
Program Control Unit (PCU) 1-7
Program Counter register (PC) 1-8
Program Data Bus (PDB) 1-10
Program Decode Controller (PDC) 1-7
program memory 1-5
program memory expansion 1-9
Program ROM, bootstrap 3-1
programming model
programming sheets
R
RAM
reading status registers 5-2
Receive Byte Registers (RXH, RXM, RXL) 6-5
Receive Clock Mode Source (RCM) 8-17
Receive Data (RXD) signal 8-4
Receive Data Full (RDF) bit 6-6
Receive Data Register (RX) 7-28
Receive Data Register Full (RDF) bit 7-27
Receive Data Register Full (RDRF) bit 8-16
Receive Data Register Full (RXDF) bit 6-26
Receive Enable (RE) bit 7-19
Receive Exception Interrupt Enable (REIE) bit 7-18
Receive Frame Sync Flag (RFS) 7-27
Receive Interrupt Enable (RIE) bit 7-18
low 1-5
management 1-5
standby modes 1-5
bus 1-10
core 4-1
DSP core 6-11
ESSI 7-12
HI08 6-11
HI08 quick reference 6-28
peripherals 5-1
SCI 8-8
timer 9-21
list B-1
program 3-1
DSP side 6-11
host side 6-20
,
3-1
,
3-2
,
6-26
Index-9
Index