SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 282

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SPAKDSP303AG100

Manufacturer Part Number
SPAKDSP303AG100
Description
IC DSP 24BIT 100MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of SPAKDSP303AG100

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
24KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SPAKDSP303AG100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Index
Index-4
initialization 7-6
initialization example 7-6
internally generated clock and frame sync 7-7
interrupt 7-7
Interrupt Service Routine (ISR) 7-8
interrupt trigger event 7-9
interrupts 7-7
multiple serial device selection 7-4
network enhancements 7-2
Network mode 7-2
Normal mode 7-2
On-Demand mode 7-9
operating mode 7-6
polling 7-7
Port Control Register (PCR) 7-6
Port Control Register C (PCRC) 7-33
Port Control Register D (PCRD) 7-33
Port Data Register (PDR) 7-34
Port Data Register C (PDRC) 7-34
Port Data Register D (PDRD) 7-34
Port Direction Register (PRR) 7-34
Port Direction Register C (PRRC) 7-34
Port Direction Register D (PRRD) 7-34
prescale divider 7-15
programming model 7-12
receive data interrupt request 7-27
Receive Data Register (RX) 7-12
Receive Shift Register 7-28
receive shift register clock output 7-4
Receive Slot Mask Register (RSM)
Receive Slot Mask Registers (RSMA and RSMB) 7-12
reset 7-6
RX clock 7-10
RX frame sync 7-10
RX frame sync pulses active 7-10
select source of clock signal 7-21
Serial Clock (SCK), ESSI 7-3
Serial Control 0 (SC00 and SC10) 7-3
Serial Control 1 (SC01 and SC11) 7-4
Serial Control 2 (SC02 and SC12) 7-5
Serial Input Flag (IF0) 7-4
Serial Output Flag 0 (OF0) bit 7-4
Serial Output Flags (OF0–OF1) 7-17
Serial Receive Data (SRD) 7-3
Serial Transmit Data (STD) 7-2
SPI protocol 7-2
Synchronous mode 7-3
Synchronous Serial Interface Status Register
polarity 7-11
selection 7-10
signal 7-7
word length 7-11
programming sheet B-25
7-32
(SSISR) 7-12
,
7-9
,
,
,
,
7-9
,
7-26
7-7
7-17
7-9
,
,
,
,
7-14
7-19
,
7-4
7-9
7-20
,
,
,
7-10
7-19
7-19
,
,
7-33
,
,
7-28
7-12
7-20
DSP56303 User’s Manual, Rev. 2
,
EOM byte 4-12
ESSI0 Interrupt Priority Level (S0L) bits 4-16
ESSI1 Interrupt Priority Level (S1L) bits 4-16
expansion memory 3-1
Extended Mode Register (EMR) 4-7
Extension (E) bit 4-11
external address bus 2-5
external bus control 2-5
External Bus Disable (EBD) bit 4-14
external data bus 2-5
External Memory Expansion Port 2-5
F
frame rate divider 7-9
Frame Rate Divider Control (DC) bits 7-15
frame sync
Frame Sync Length (FSL) bits 7-21
Frame Sync Polarity (FSP) bit 7-20
Frame Sync Relative Timing (FSR) bit 7-21
Framing Error Flag (FE) bit 8-15
Synchronous/Asynchronous (SYN) bit 7-10
Time Slot Register (TSR) 7-8
Transmit Data Registers (TX0–TX2) 7-12
Transmit Enable (TE) 7-17
Transmit Shift Registers 7-28
Transmit Slot Mask Register (TSM)
Transmit Slot Mask Registers (TSMA and
TX clock 7-10
variable prescaler 7-15
word length frame sync 7-11
word length frame sync timing 7-11
Arithmetic Saturation Mode (SM) 4-8
Cache Enable (CE) 4-8
Core Priority (CP) 4-8
DO FOREVER (FV) Flag 4-9
Rounding Mode (RM) 4-8
Sixteen-Bit Arithmetic Mode (SA) 4-8
generator 7-16
length 7-10
selection 7-10
signal 7-7
bit definitions 7-27
Receive Data Register Full (RDF) 7-27
Receiver Frame Sync Flag (RFS) 7-27
Receiver Overrun Error Flag (ROE) 7-27
Serial Input Flag 0 (IF0) 7-28
Serial Input Flag 1 (IF1) 7-28
Transmit Data Register Empty (TDE) 7-27
Transmit Frame Sync Flag (TFS) 7-27
Transmitter Underrun Error Flag (TUE) 7-27
programming sheet B-25
TSMB) 7-12
,
7-9
,
7-17
,
7-31
,
2-7
,
Freescale Semiconductor
7-31
,
7-31

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