SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 218

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SPAKDSP303AG100

Manufacturer Part Number
SPAKDSP303AG100
Description
IC DSP 24BIT 100MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of SPAKDSP303AG100

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Device Core Size
24b
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
24KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SPAKDSP303AG100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Triple Timer Module
9-26
Bit Number
7–4
3
Table 9-3. Timer Control/Status Register (TCSR) Bit Definitions (Continued)
Bit Name
TC[3–0]
Reset Value
0
0
DSP56303 User’s Manual, Rev. 2
Timer Control
Control the source of the timer clock, the behavior of the TIO signal, and the
Timer mode of operation. Section 9.3, Operating Modes, on page 9-5
describes the timer operating modes in detail. To ensure proper operation,
the TC[3–0] bits should be changed only when the timer is disabled (that is,
when the TCSR[TE] bit is cleared).
Note:
Note:
Reserved. Write to zero for future compatibility.
TC3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit Settings
TC2
If the clock is external, the counter is incremented by the transitions
on the TIO signal. The external clock is internally synchronized to
the internal clock, and its frequency should be lower than the
internal operating frequency divided by 4 (that is, CLK/4).
The GPIO function is enabled only if all of the TC[3–0] bits are 0.
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TC1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Number
Description
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Mode Characteristics
Event counter
measurement
measurement
Timer toggle
Input period
Timer pulse
Pulse width
modulation
Input width
Timer and
Watchdog
Watchdog
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Function
Capture
Toggle
Mode
GPIO
event
pulse
Freescale Semiconductor
Outpu
t
Outpu
t
Outpu
t
Outpu
Outpu
GPIO
Input
Input
Input
Input
TIO
1
t
t
Internal
Internal
Internal
Externa
Internal
Internal
Internal
Internal
Internal
Internal
Clock
l

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