SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 177

• Manufacturer Part Number: SPAKDSP303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of SPAKDSP303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The SCI includes the GPIO functions described in Section 8.7, GPIO Signals and Registers, on
page 8-22. The next subsections describe the registers and their bits.
Freescale Semiconductor
Data Type: 1 = Address Byte
— SCI Transmit Data Address Register (STXA) in Figure 8-7
(SSFTD = 1)
(SSFTD = 1)
(SSFTD = 1)
(SSFTD = 1)
WDS2 WDS1 WDS0
(SSFTD = 1)
WDS2 WDS1 WDS0
WDS2 WDS1 WDS0
WDS2 WDS1 WDS0
WDS2 WDS1 WDS0
TX
TX
TX
TX
0
0
1
1
1
0 = Data Byte
TX
Mode 0
Mode 2
Mode 4
Mode 5
Mode 6
0
1
0
0
1
Start
Start
Start
Start
Figure 8-1. SCI Data Word Formats (SSFTD = 1), 1
0
0
0
1
0
D7
D7
D7
D7
D7
10-bit Asynchronous (1 Start, 8 Data, 1 Stop)
11-bit Asynchronous (1 Start, 8 Data, 1 Even Parity, 1 Stop)
11-bit Asynchronous (1 Start, 8 Data, 1 Odd Parity, 1 Stop)
8-bit Synchronous Data (Shift Register Mode)
11-bit Asynchronous Multidrop (1 Start, 8 Data, 1 Data Type, 1 Stop)
• Modes 1, 3, and 7 are reserved.
• D0 = LSB; D7 = MSB
• Data is transmitted and received LSB first if SSFTD = 0, or MSB first if SSFTD
D6
D6
D6
D6
D6
= 1
DSP56303 User’s Manual, Rev. 2
One Byte From Shift Register
D5
D5
D5
D5
D5
D4
D4
D4
D4
D4
D3
D3
D3
D3
D3
D2
D2
D2
D2
D2
D1
D1
D1
D1
D1
D0 or
D0 or
D0 or
Type
Type
Type
Data
Data
Data
D0
D0
Parity
Parity
Even
Type
Odd
Data
Stop
Bit
SCI Programming Model
Stop
Stop
Stop
Bit
Bit
Bit
8-9