SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 246

• Manufacturer Part Number: SPAKDSP303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of SPAKDSP303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Programming Reference
B.1 Internal I/O Memory Map
B-2
Peripheral
Timers
GPIO
ESSI
HI08
SCI
OnCE
PLL
IPR
BIU
Figure B-9, "Host Transmit Data Register"
Figure B-10, "Host Base Address and Host Port Control Registers"
Figure B-11, "Host Control Register"
Figure B-12, "Interrupt Control and Command Vector Registers"
Figure B-13, "Interrupt Vector and Host Transmit Data Registers"
Figure B-14, "ESSI Control Register A (CRA)"
Figure B-15, "ESSI Control Register B (CRB)"
Figure B-16, "ESSI Transmit and Receive Slot Mask Registers (TSM, RSM)"
Figure B-17, "SCI Control Register (SCR)"
Figure B-18, "SCI Clock Control Registers (SCCR)"
Figure B-19, "Timer Prescaler Load Register (TPLR)"
Figure B-20, "Timer Control/Status Register (TCSR)"
Figure B-21, "Timer Load, Compare, and Count Registers (TLR, TCPR, TCR)"
Figure B-22, "Host Data Direction and Host Data Registers (HDDR, HDR)"
Figure B-23, "Port C Registers (PCRC, PRRC, PDRC)"
Figure B-24, "Port D Registers (PCRD, PRRD, PDRD)"
Figure B-25, "Port E Registers (PCRE, PRRE, PDRE)"
16-Bit Address
Table B-1. Guide to Programming Sheets (Continued)
Table B-2. Internal I/O Memory Map (X Data Memory)
$FFFE
$FFFD
$FFFC
$FFFB
$FFFA
$FFFF
$FFF9
$FFF8
$FFF7
$FFF6
$FFF5
DSP56303 User’s Manual, Rev. 2
24-Bit Address
$FFFFFD
$FFFFFC
$FFFFFF
$FFFFFE
$FFFFFB
$FFFFFA
$FFFFF9
$FFFFF8
$FFFFF7
$FFFFF6
$FFFFF5
Interrupt Priority Register Core (IPRC)
Interrupt Priority Register Peripheral (IPRP)
PLL Control Register (PCTL)
OnCE GDB Register (OGDB)
Bus Control Register (BCR)
DRAM Control Register (DCR)
Address Attribute Register 0 (AAR0)
Address Attribute Register 1 (AAR1)
Address Attribute Register 2 (AAR2)
Address Attribute Register 3 (AAR3)
ID Register (IDR)
Register Name
Freescale Semiconductor
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