SPAKDSP303AG100 Freescale Semiconductor, SPAKDSP303AG100 Datasheet - Page 284

• Manufacturer Part Number: SPAKDSP303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of SPAKDSP303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Index
Index-6
hardware reset 6-20
HI08-to-DSP core interface 6-1
HI08-to-host
Host Base Address Register (HBAR) 6-12
host command 6-7
Host Control Register (HCR) 6-12
Host Data Direction Register (HDDR) 6-3
Host Data Direction Register (HDRR) 6-30
Host Data Register (HDR) 6-12
host interrupt request pins (IRQx) 6-8
Host Port Control Register (HPCR) 6-3
host processor registers 6-12
Host Receive (HRX) register 6-5
Host Receive Data Register (HRX) 6-19
Host Receive Request (HRRQ) 6-8
host request line 6-3
host request pins 6-9
host side
host side registers after reset 6-27
Host Status Register (HSR) 6-12
software polling 6-5
interface 6-1
programming sheet B-19
Host Command Interrupt Enable (HCIE) 6-13
Host Flags 2, 3 (HF) 6-12
Host Receive Interrupt Enable (HRIE) 6-13
Host Transmit Interrupt Enable (HTIE) 6-13
programming sheet B-20
programming sheet B-31
programming sheet B-31
6-20
Host Acknowledge Enable (HAEN) 6-18
Host Acknowledge Polarity (HAP) 6-16
Host Address Line 8 Enable (HA8EN) 6-18
Host Address Line 9 Enable (HA9EN) 6-18
Host Address Strobe Polarity (HASP) 6-17
Host Chip Select Enable (HCSEN) 6-18
Host Chip Select Polarity (HCSP) 6-17
Host Data Strobe Polarity (HDSP) 6-17
Host Dual Data Strobe (HDDS) 6-17
Host Enable (HEN) 6-17
Host GPIO Port Enable (HGEN) 6-18
Host Multiplexed Bus (HMUX) 6-17
Host Request Enable (HREN) 6-18
Host Request Open Drain (HROD) 6-17
Host Request Polarity (HRP) 6-16
programming sheet B-4
Command Vector Register (CVR) 6-24
Interface Control Register (ICR) 6-22
Interface Status Register (ISR) 6-24
Interface Vector Register (IVR) 6-26
Receive Byte Registers (RXH, RXM, RXL) 6-26
Transmit Byte Registers (TXH, TXM, TXL) 6-27
Host Command Pending (HCP) 6-14
Host Flags 0, 1 (HF) 6-14
,
6-28
,
6-29
,
,
6-21
6-27
,
B-19
,
,
,
6-15
6-13
,
6-19
6-28
,
,
,
6-30
,
6-30
6-30
6-12
DSP56303 User’s Manual, Rev. 2
,
,
6-15
6-12
,
6-16
,
,
,
6-30
6-14
7-19
,
Host Transmit (HTX) register 6-6
Host Transmit Data Register (HTDR)
host-side
host-to-DSP
HREQ/HTRQ handshake flags 6-21
instructions and addressing modes. 6-4
Interface Control Register (ICR) 6-21
Interface Status Register (ISR) 6-21
interrupt routines 6-7
Interrupt Vector Register (IVR) 6-21
interrupt-based techniques 6-20
masking interrupts 6-7
MOVEP instruction 6-12
multiplexed bus mode 6-3
non-multiplexed bus mode 6-3
pipeline 6-5
polling techniques 6-20
programming model
Receive Byte Registers (RXH, RHM, RHL) 6-6
Receive Byte Registers (RXH, RXM, RXL) 6-5
register banks 6-4
request service from host 6-8
resets
single-strobe mode 6-19
software polling 6-6
software reset 6-27
Host Receive Data Full (HRDF) 6-14
Host Transmit Data Empty (HTDE) 6-14
programming sheet B-18
register map 6-22
data transfers 6-5
data word 6-1
handshaking protocols 6-1
instructions 6-1
mapping 6-1
Double Host Request (HDRQ) 6-8
Host Flag 0 (HF0) 6-23
Host Flag 1 (HF1) 6-23
Host Little Endian (HLEND) 6-23
Initialize (INIT) 6-22
Receive Request Enable (RREQ) 6-23
Transmit Request Enable (TREQ) 6-23
Host Flag 2 (HF2) 6-25
Host Flag 3 (HF3) 6-25
Host Request (HREQ) 6-25
Receive Data Full (RDF) 6-6
Receive Data Register Full (RXDF) 6-26
Transmit Data Empty (TDE) 6-6
Transmit Data Register Empty (TXDE) 6-25
Transmitter Ready (TRDY) 6-25
programming sheet B-22
DSP side 6-11
host side 6-20
quick reference 6-28
hardware and software 6-3
,
6-19
,
6-26
,
6-15
,
Freescale Semiconductor
,
B-22
,
,
6-18
6-12
6-18
,
6-19
,
,
6-24
,
6-26
6-22
,
,
6-23
6-26
,
6-30
,
6-26