HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 598

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14. Direct Memory Access Controller (DMAC)
• The following kinds of DMAC transfer activation requests are provided
• Channel functions: Transfer modes that can be set are different for each channel.
Rev.4.00 Oct. 10, 2008 Page 498 of 1122
REJ09B0370-0400
⎯ External request
⎯ On-chip peripheral modules request
⎯ Auto-request
(1) Normal DMA mode
(2) DDT mode
(1) Normal DMA mode
(2) On-demand data transfer mode (DDT mode)
Transfer requests from the SCI, SCF, and TMU. These can be accepted on all channels.
A transfer request is generated automatically within the DMAC.
• Channel 0: Single or dual address mode. External requests are accepted.
• Channel 1: Single or dual address mode. External requests are accepted.
• Channel 2: Dual address mode only
• Channel 3: Dual address mode only
• Channel 4 (SH7751R only): Dual address mode only
• Channel 5 (SH7751R only): Dual address mode only
• Channel 6 (SH7751R only): Dual address mode only
• Channel 7 (SH7751R only): Dual address mode only
• Channel 0: Single or dual address mode. External requests are accepted.
• Channel 1: Single or dual address mode. External requests are accepted.
• Channel 2: Single or dual address mode. External requests are accepted.
• Channel 3: Single or dual address mode. External requests are accepted.
• Channel 4 (SH7751R only): Single or dual address mode. External requests are
• Channel 5 (SH7751R only): Single or dual address mode. External requests are
Two DREQ pins. Low level detection or falling edge detection can be specified.
External requests can only be accepted on channel 0 and channel 1.
The SH7551 performs interfacing between an external device and the DMAC using the
DBREQ, BAVL, TR, TDACK, ID [1:0], and D[31:0] pins. The SH7551R performs
interfacing between an external device and the DMAC using the DBREQ, BAVL, TR,
TDACK, ID [2:0], and D[31:0] pins. External requests can be accepted on all eight
channels.
Channel 0 does not have a request queue, but channels 1 to 3 in the SH7751 and
channels 1 to 7 in the SH7751R each have four request queues.
accepted.
accepted.

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