HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 1100

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

23. Electrical Characteristics
Table 23.18 Clock and Control Signal Timing (HD6417751BP167 (V), HD6417751F167 (V))
V
Item
EXTAL clock input cycle time
EXTAL clock input low-level pulse width
EXTAL clock input high-level pulse width
EXTAL clock input rise time
EXTAL clock input fall time
CKIO clock output cycle time
CKIO clock output low-level pulse width
CKIO clock output high-level pulse width
CKIO clock output rise time
CKIO clock output fall time
CKIO clock output low-level pulse width
CKIO clock output high-level pulse width
Power-on oscillation settling time
Power-on oscillation settling time/mode settling
MD reset setup time
MD reset hold time
RESET assert time
PLL synchronization settling time
Standby return oscillation settling time 1
Standby return oscillation settling time 2
Standby return oscillation settling time 3
IRL interrupt determination time
(RTC used, standby mode)
TRST reset hold time
Notes:
Rev.4.00 Oct. 10, 2008 Page 1000 of 1122
REJ09B0370-0400
EXTAL
clock input
frequency
CKIO clock
output
DDQ
= 3.0 to 3.6 V, V
When a crystal resonator is connected to EXTAL and XTAL, the maximum frequency is 28 MHz. When
a 3rd overtone crystal resonator is used, an external tank circuit is necessary.
As there is feedback from the CKIO pin when PLL2 is operating, the load capacitance connected to the
CKIO pin should be a maximum of 50 pF.
PLL1/PLL2
operating
PLL1/PLL2 not
operating
PLL2 operating
PLL2 not operating
DD
= 1.8 V, T
1/2 divider operating
1/2 divider not operating f
1/2 divider operating
1/2 divider not operating f
a
= –20 to 75°C, C
Symbol Min
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
f
f
f
EXcyc
EXL
EXH
EXr
EXf
cyc
CKOL1
CKOH1
CKOr
CKOf
CKOL2
CKOH2
OSC1
OSCMD
MDRS
MDRH
RESW
PLL
OSC2
OSC3
OSC4
IRLSTB
TRSTRH
EX
EX
EX
EX
OP
OP
L
= 30 pF
17.8
3.5
3.5
—
—
11.9
1
1
—
—
3
3
10
10
3
20
20
200
10
5
5
—
0
30
15
2
1
30
1
Max
1000
—
—
4
4
1000
—
—
3
3
—
—
—
—
—
—
—
—
—
—
—
200
—
56
28
56
28
84
84
Unit
MHz
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ms
ms
t
ns
t
μs
ms
ms
ms
μs
ns
cyc
cyc
Figure
23.1
23.1
23.1
23.1
23.1
23.2 (1)
23.2 (1)
23.2 (1)
23.2 (1)
23.2 (1)
23.2 (2)
23.2 (2)
23.3, 23.5
23.3, 23.5
23.3, 23.5
23.3, 23.4, 23.5,
23.6
23.9, 23.10
23.4, 23.6
23.7
23.8
23.10
23.3, 23.5