HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 20

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Rev.4.00 Oct. 10, 2008 Page xviii of xcviii
REJ09B0370-0400
Item
9.9.1 In Reset
Figure 9.2 STATUS
Output in Manual Reset
9.9.5 Hardware
Standby Mode Timing
Figure 9.15 Timing
When VDD-RTC Power
is Off → On
9.10 Usage Notes
10.1.1 Features
Page
255
264
264, 265 Newly added
267
Description amended
Revision (See Manual for Details)
Figure amended
MRESET *
Figure amended
V
Note: * V
•
…
•
STATUS
DD
RESET
V
, V
RESET
CKIO
Three clocks
The CPG can generate
CPU, FPU, caches, and TLB, the peripheral module clock
(Pck) used by the peripheral modules, and the bus clock
(Bck) used by the external bus interface.
Frequency change function
PLL (phase-locked loop) circuits and a frequency divider in
the CPG enable the CPU clock, bus clock, and peripheral
module clock frequencies to be changed
changes are performed by software in accordance with the
settings in the frequency control register (FRQCR).
DD-RTC
DDQ
CA
DD
*
(High)
Normal
, V
DD-PLL1/2
, V
DDQ
≥ 0 Bcyc
, V
DD-CPG
Must be asserted for
t
RESW
Power-on oscillation
settling time
Min 0s
or longer
the CPU clock (Ick) used by the
Reset
0–30 Bcyc
. Frequency
Normal