HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 427

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12.3
Each channel has a 32-bit timer counter (TCNT) that performs count-down operations, and a 32-
bit timer constant register (TCOR). The channels have an auto-reload function that allows cyclic
count operations, and can also perform external event counting. Channel 2 also has an input
capture function.
12.3.1
When one of bits STR0–STR4 is set to 1 in the timer start register (TSTR, TSTR2), the timer
counter (TCNT) for the corresponding channel starts counting. When TCNT underflows, the UNF
flag is set in the corresponding timer control register (TCR). If the UNIE bit in TCR is set to 1 at
this time, an interrupt request is sent to the CPU. At the same time, the value is copied from
TCOR into TCNT, and the count-down continues (auto-reload function).
Example of Count Operation Setting Procedure: Figure 12.2 shows an example of the count
operation setting procedure.
1. Select the count clock with bits TPSC2–TPSC0 in the timer control register (TCR). When an
2. Specify whether an interrupt is to be generated on TCNT underflow with the UNIE bit in TCR.
3. When the input capture function is used, set the ICPE bits in TCR, including specification of
4. Set a value in the timer constant register (TCOR).
5. Set the initial value in the timer counter (TCNT).
6. Set the STR bit to 1 in the timer start register (TSTR, TSTR2) to start the count.
external clock in channels 0 to 2 is selected, set the TCLK pin to input mode with the TCOE
bit in TOCR, and select the external clock edge with bits CKEG1 and CKEG0 in TCR.
whether the interrupt function is to be used.
Operation
Counter Operation
Rev.4.00 Oct. 10, 2008 Page 327 of 1122
12. Timer Unit (TMU)
REJ09B0370-0400

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