HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 408

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

11. Realtime Clock (RTC)
11.2.17 RTC Control Register (RCR3) and Year-Alarm Register (RYRAR)
RCR3 and RYRAR are readable/writable registers. RYRAR is the alarm register for the RTC's
BCD-coded year-value counter RYRCNT. When the YENB bit of RCR3 is set to 1, the RYRCNT
value is compared with the RYRAR value. Comparison between the counter and the alarm register
only takes place with the alarm registers in which the ENB and YENB bits are set to 1. The alarm
flag of RCR1 is only set to 1 when the respective values all match.
The setting range of RYRAR is decimal 0000 to 9999, and normal operation is not obtained if a
value beyond this range is set here.
RCR3 is initialized by a power-on reset, but RYRAR will not be initialized by a power-on or
manual reset, or by the device entering standby mode.
Bits 6 to 0 of RCR3 are always read as 0. A write to these bits is invalid. If a value is written to
these bits, it should always be 0.
RCR3
RYRAR
Rev.4.00 Oct. 10, 2008 Page 308 of 1122
REJ09B0370-0400
Initial value:
Initial value:
Initial value:
(SH7751R Only)
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
YENB
R/W
R/W
R/W
15
7
0
7
R/W
R/W
14
—
R
6
0
6
1000 years
10 years
R/W
R/W
13
—
R
5
0
5
R/W
R/W
12
—
R
4
0
4
R/W
R/W
11
—
R
3
0
3
R/W
R/W
10
—
R
2
0
2
100 years
1 year
R/W
R/W
—
R
1
0
9
1
R/W
R/W
—
R
0
0
8
0