HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 248

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5. Exceptions
(2) Manual Reset
• Sources:
• Transition address: H'A000 0000
• Transition operations:
Table 5.3
Type
Power-on reset
Manual reset
Rev.4.00 Oct. 10, 2008 Page 148 of 1122
REJ09B0370-0400
Manual_reset()
{
}
⎯ MRESET pin low level and RESET pin high level
⎯ When a general exception other than a user break occurs while the BL bit is set to 1 in SR
⎯ When the watchdog timer overflows while the RSTS bit is set to 1 in WTCSR. For details,
Exception code H'020 is set in EXPEVT, initialization of VBR and SR is performed, and a
branch is made to PC = H'A000 0000.
In the initialization processing, the VBR register is set to H'0000 0000, and in SR, the MD,
RB, and BL bits are set to 1, the FD bit is cleared to 0, and the interrupt mask bits (IMASK)
are set to B'1111.
CPU and on-chip peripheral module initialization is performed. For details, see the register
descriptions in the relevant sections.
EXPEVT = H'00000020;
VBR = H'00000000;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
SR.IMASK = B'1111;
SR.FD = 0;
Initialize_CPU();
Initialize_Module(Manual);
PC = H'A0000000;
see section 10, Clock Oscillation Circuits.
Types of Reset
Reset State Transition
Conditions
MRESET
—
Low
Low
RESET
High
Internal States
CPU
Initialized
Initialized
On-Chip Peripheral Modules
See Register Configuration in
each section