HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 761
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Part Number
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Quantity
Price
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Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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No
No
Read receive data in SCRDR1,
Read ORER flag in SCSSR1
Read RDRF flag in SCSSR1
Clear RE bit in SCSCR1 to 0
and clear RDRF flag
All data received?
Start of reception
End of reception
in SCSSR1 to 0
Figure 15.22 Sample Serial Reception Flowchart (1)
RDRF = 1?
ORER = 1?
No
Yes
Yes
Error handling
Yes
Rev.4.00 Oct. 10, 2008 Page 661 of 1122
15. Serial Communication Interface (SCI)
1. Receive error handling: If a
2. SCI status check and receive
3. Serial reception continuation
receive error occurs, read the
ORER flag in SCSSR1 , and
after performing the appropriate
error handling, clear the ORER
flag to 0. Transfer cannot be
resumed if the ORER flag is set
to 1.
data read: Read SCSSR1 and
check that the RDRF flag is set
to 1, then read the receive data
in SCRDR1 and clear the RDRF
flag to 0. Transition of the RDRF
flag from 0 to 1 can also be
identified by an RXI interrupt.
procedure: To continue serial
reception, finish reading the
RDRF flag, reading SCRDR1,
and clearing the RDRF flag to 0,
before the MSB (bit 7) of the
current frame is received. (The
RDRF flag is cleared
automatically when the direct
memory access controller
(DMAC) is activated by a
receive-data-full interrupt (RXI)
request and the SCRDR1 value
is read.)
REJ09B0370-0400
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