HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 945
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Quantity
Price
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Part Number:
HD6417751RF240V
Manufacturer:
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Quantity:
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21.3.4
In this LSI, setting a command from the H-UDI in SDIR can place the H-UDI pins in the
boundary scan mode. However, the following limitations apply.
1. Clock-related signals (EXTAL, EXTAL2, XTAL, XTAL2, and CKIO) are excluded from the
2. Reset-related signals (RESET, MRESET, and CA) are excluded from the boundary scan.
3. H-UDI signals (TCK, TDI, TDO, TMS, and TRST) are excluded from the boundary scan.
4. With EXTEST, assert the MRESET pin (Low), negate the RESET pin (High), and assert the
5. When executing a boundary scan (EXTEST, SAMPLE/PRELOAD, and BYPASS), supply a
21.4
1. SDIR Command
2. SDIR Commands in Sleep Mode
3. In standby mode, the H-UDI function cannot be used. Furthermore, TCK must be retained at a
4. The H-UDI is used for emulator connection. Therefore, H-UDI functions cannot be used when
5. When the SH7751 is in bypass mode, the bypass register (SDBPR) is not fixed in the Capture-
boundary scan.
CA pin (High). With SAMPLE/PRELOAD, assert the CA pin (High).
clock signal to the EXTAL pin. The allowed range of input clock frequencies is from 1 to 33.3
MHz. Execute the boundary scan after t
elapsed. The clock signal need not be supplied to the EXTAL pin after t
details on t
Characteristics.
Once an SDIR command is set, it does not change until another command is written from the
H-UDI, unless initialized by asserting TRST or the TAP is set in the Test-Logic-Reset state.
Sleep mode is cleared by an H-UDI interrupt or H-UDI reset, and these exception requests are
accepted in this mode. In standby mode, neither an H-UDI interrupt nor an H-UDI reset is
accepted.
high level when entering the standby mode in order to retain the TAP state before and after
standby mode.
an emulator is used.
DR state. (It is cleared to 0 in the SH7751R.)
Boundary Scan (EXTEST, SAMPLE/PRELOAD, BYPASS)
Usage Notes
OSC1
(the power-on oscillation-stabilization time), see section 23, Electrical
OSC1
21. High-performance User Debug Interface (H-UDI)
(the power-on oscillation-stabilization time) has
Rev.4.00 Oct. 10, 2008 Page 845 of 1122
OSC1
has elapsed. For
REJ09B0370-0400
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