HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 1061
![MPU 1.5/3.3V 0K PB-FREE 256-QFP](/photos/28/62/286201/256-bfqfp__prqp0256la-b_sml.jpg)
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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22.4.2
Big and little endians are supported on the local bus, determined at power-on reset by the external
endian specification pin (MD5). Therefore, when transferring data between the local bus and the
PCI bus, when the local bus is set for big endian, big/little endian conversion is therefore required.
Figure 22.19 shows the block diagram of the local bus endian control. An endian conversion
circuit is provided between the local bus and the FIFO. For details of the endian control, refer to
section 22.4.3, Endian Control in DMA Transfers, and section 22.4.4, Endian Control in Target
Transfers (Memory Read/Memory Write).
22.4.3
Although only the longword access size is supported in DMA transfers (see table 22.11), the
endian conversion mode can be selected from the following four types depending on whether the
longword data consists of four byte data units or two word data units.
The conversion mode can be switched by the setting of bits 10 and 9 (ALNMD) of the DMA
control registers (PCIDCR0 to 3) for PCI.
1. Byte data boundary mode: Big/little endian conversion is performed on the assumption that all
2. Word/longword (W/LW) boundary mode 1: Longword data is transferred as byte data x 4.
3. Word/longword (W/LW) boundary mode 2: Longword data is transferred as word data x 2.
data is on a byte boundary. (ALNMD = b'00)
(ALNMD = b'01)
(ALNMD = b'10)
Big/little endian
Endian Control for Local Bus
Endian Control in DMA Transfers
Local bus
32 bits
32 bits
Figure 22.19 Endian Control for Local Bus
Big/little →
Little →
big/little
little
B, W, LW
LW
LW
LW
Rev.4.00 Oct. 10, 2008 Page 961 of 1122
Targer WT
Target RD
FIFO
FIFO
DMA
DMA
22. PCI Controller (PCIC)
32 bits
32 bits
Little endian
REJ09B0370-0400
PCI bus
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