MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 74

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1. Read: Anytime
1. Read: Anytime
Port Integration Module (S12PPIMV1)
2.3.19
2.3.20
74
Address 0x0243
Address 0x0244
Write: Anytime
Write: Anytime
RDRT
PERT
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port T reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port T pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
RDRT7
PERT7
Port T Reduced Drive Register (RDRT)
Port T Pull Device Enable Register (PERT)
0
0
7
7
RDRT6
PERT6
Figure 2-18. Port T Pull Device Enable Register (PERT)
0
0
6
6
Figure 2-17. Port T Reduced Drive Register (RDRT)
Table 2-17. RDRT Register Field Descriptions
Table 2-18. PERT Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
RDRT5
PERT5
5
0
5
0
RDRT4
PERT4
0
0
4
4
Description
Description
RDRT3
PERT3
0
0
3
3
RDRT2
PERT2
0
0
2
2
Access: User read/write
Access: User read/write
Freescale Semiconductor
RDRT1
PERT1
0
0
1
1
RDRT0
PERT0
0
0
0
0
(1)
(1)

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