MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 49

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2 Port Integration Module (S12PPIMV1)
Revision History
2.1
2.1.1
The S12P Family Port Integration Module establishes the interface between the peripheral modules and
the I/O pins for all ports. It controls the electrical pin properties as well as the signal prioritization and
multiplexing on shared pins.
This section covers:
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices.
Freescale Semiconductor
(Item No.)
Rev. No.
V01.00
V01.01
V01.02
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Port A and B used as general purpose I/O
Port E associated with the IRQ, XIRQ interrupt inputs
Port T associated with 1 timer module
Port S associated with 1 SCI module
Port M associated with 1 MSCAN and 1 SPI module
Port P connected to the PWM - inputs can be used as an external interrupt source
Port J used as general purpose I/O - inputs can be used as an external interrupt source
Port AD associated with one 10-channel ATD module
Introduction
(Submitted By)
Overview
05 May 2008
19 Mar 2008
12 Jan 2009
This section assumes the availability of all features (80-pin package option).
Some functions are not available on lower pin count package options. Refer
to the pin-out summary section.
Date
Sections
Affected
S12P-Family Reference Manual, Rev. 1.13
Initial version
Corrected mistakes in Port J register and field names
Corrected PERxAD register descriptions
Replaced VREG_API with API_EXTCLK
Minor corrections
NOTE
Substantial Change(s)
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