MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 45

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device Overview MC9S12P-Family
45
Vector Address
Vector base + $EC
Vector base + $DA
Vector base + $CE
Vector base + $CC
Vector base + $CA
Vector base + $BC
Vector base + $BA
Vector base + $E2
Vector base + $D8
Vector base + $D4
Vector base + $D2
Vector base + $D0
Vector base + $C8
Vector base + $C6
Vector base + $C4
Vector base + $B8
Vector base + $B6
Vector base + $B4
Vector base + $B2
Vector base + $B0
Vector base+ $DE
Vector base+ $DC
Vector base+ $EE
Vector base+ $EA
Vector base+ $D6
Vector base+ $F0
Vector base+ $E8
Vector base+ $E6
Vector base+ $E4
Vector base+ $E0
to
to
(1)
TIM Pulse accumulator A overflow
TIM Pulse accumulator input edge
Oscillator status interrupt
RTI timeout interrupt
TIM timer channel 0
TIM timer channel 1
TIM timer channel 2
TIM timer channel 3
TIM timer channel 4
TIM timer channel 5
TIM timer channel 6
TIM timer channel 7
Table 1-12. Interrupt Vector Locations (Sheet 2 of 3)
TIM timer overflow
FLASH command
Interrupt Source
PLL lock interrupt
CAN wake-up
CAN transmit
FLASH error
CAN receive
CAN errors
Port J
ATD
SCI
SPI
S12P-Family Reference Manual, Rev. 1.13
Mask
CCR
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
Reserved
Reserved
Reserved
Reserved
CANRIER (CSCIE, OVRIE)
PIEJ (PIEJ7-PIEJ6, PIEJ2-
FERCNFG (SFDIE, DFDIE)
SPICR1 (SPIE, SPTIE)
CANTIER (TXEIE[2:0])
(TIE, TCIE, RIE, ILIE)
CPMUINT (LOCKIE)
CANRIER (WUPIE)
CPMUINT (OSCIE)
CANRIER (RXFIE)
ATDCTL2 (ASCIE)
CPMUINT (RTIE)
PACTL (PAOVI)
FCNFG (CCIE)
Local Enable
TSRC2 (TOF)
PACTL (PAI)
TIE (C0I)
TIE (C1I)
TIE (C2I)
TIE (C3I)
TIE (C4I)
TIE (C5I)
TIE (C6I)
TIE (C7I)
SCICR2
PIEJ0)
Freescale Semiconductor
from STOP
Wake up
Yes
Yes
Yes
8.4.7 Interrupts
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
7.6 Interrupts
from WAIT
Wakeup
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No