MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 134

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Background Debug Module (S12SBDMV1)
clock please make sure that the communication rate is adapted accordingly and a communication time-out
(BDM soft reset) has occurred.
5.3
5.3.1
Table 5-1
5.3.2
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
134
0x3_FF00
0x3_FF01
0x3_FF02
0x3_FF03
0x3_FF04
Address
Global
Memory Map and Register Definition
shows the BDM memory map when BDM is active.
Module Memory Map
Register Descriptions
Reserved
Reserved
Reserved
Reserved
BDMSTS
Register
Name
0x3_FF0C–0x3_FF0E
0x3_FF00–0x3_FF0B
0x3_FF10–0x3_FFFF
Global Address
0x3_FF0F
W
W
W
W
W
R
R
R
R
R
ENBDM
Bit 7
X
X
X
X
X
S12P-Family Reference Manual, Rev. 1.13
Figure 5-2. BDM Register Summary
= Unimplemented, Reserved
= Indeterminate
BDMACT
Table 5-1. BDM Memory Map
X
X
X
X
6
Family ID (part of BDM firmware ROM)
X
X
X
X
5
0
BDM firmware ROM
BDM firmware ROM
BDM registers
Module
SDV
4
X
X
X
X
Figure
TRACE
X
X
X
X
3
0
5-2. Registers are accessed by
= Implemented (do not alter)
= Always read zero
X
X
X
X
2
0
Freescale Semiconductor
(Bytes)
Size
UNSEC
240
12
3
1
X
X
X
1
0
Bit 0
X
X
X
0
0