MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 248

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
S12 Clock, Reset and Power Management Unit (S12CPMU)
Windowed COP operation is enabled by setting WCOP in the CPMUCOP register. In this mode, writes to
the CPMUARMCOP register to clear the COP timer must occur in the last 25% of the selected time-out
period. A premature write will immediately reset the part.
7.5.3
The on-chip POR circuitry detects when the internal supply V
(voltage level not specified in this document because this supply is not visible on device pins). POR is
deasserted, if the internal supply V
this document because this supply is not visible on device pins).
7.5.4
The on-chip LVR circuitry detects when one of the supply voltages V
appropriate voltage level. If LVR is deasserted the MCU is fully operational at the specified maximum
speed.The LVR assert and deassert levels for the supply voltage VDDX are V
specified in the device Reference Manual.
7.6
The interrupt/reset vectors requested by the S12CPMU are listed in
specification for related vector addresses and priorities.
248
Interrupts
Power-On Reset (POR)
Low-Voltage Reset (LVR)
RTI time-out interrupt
Low voltage interrupt
Interrupt Source
Periodical Interrupt
PLL lock interrupt
High temperature
Oscillator status
Autonomous
interrupt
interrupt
Table 7-27. S12CPMU Interrupt Vectors
S12P-Family Reference Manual, Rev. 1.13
DD
exceeds an appropriate voltage level (voltage level not specified in
Mask
CCR
I bit
I bit
I bit
I bit
I bit
I bit
CPMUAPICTL (APIE)
CPMUHTCTL (HTIE)
CPMUINT (LOCKIE)
CPMULVCTL (LVIE)
CPMUINT (OSCIE)
CPMUINT (RTIE)
DD
Local Enable
drops below an appropriate voltage level
Table
DD
, V
7-27. Refer to MCU
DDF
LVRXA
or V
Freescale Semiconductor
and V
DDX
drops below an
LVRXD
and are

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