MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 435

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x3_FF0F located in P-Flash memory (see
indicated by reset condition F in
Freescale Semiconductor
Offset Module Base + 0x0001
Reset
W
R
Flash Security Register (FSEC)
F
7
KEYEN[1:0]
1. BUSCLK is Greater Than this value.
2. BUSCLK is Less Than or Equal to this value.
BUSCLK Frequency
MIN
10.6
11.6
12.6
13.6
14.6
15.6
1.0
1.6
2.6
3.6
4.6
5.6
6.6
7.6
8.6
9.6
= Unimplemented or Reserved
(1)
Table 13-7. FDIV values for various BUSCLK Frequencies
(MHz)
F
6
MAX
Figure 13-6. Flash Security Register (FSEC)
10.6
11.6
12.6
13.6
14.6
15.6
16.6
1.6
2.6
3.6
4.6
5.6
6.6
7.6
8.6
9.6
Figure
S12P-Family Reference Manual, Rev. 1.13
(2)
F
5
13-6. If a double bit fault is detected while reading the P-Flash
FDIV[5:0]
0x0C
0x0D
0x0A
0x0B
0x0E
0x0F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
F
4
RNV[5:2]
BUSCLK Frequency
MIN
16.6
17.6
18.6
19.6
20.6
21.6
22.6
23.6
24.6
25.6
26.6
27.6
28.6
29.6
30.6
31.6
1
F
3
(MHz)
128 KByte Flash Module (S12FTMRC128K1V1)
MAX
17.6
18.6
19.6
20.6
21.6
22.6
23.6
24.6
25.6
26.6
27.6
28.6
29.6
30.6
31.6
32.6
2
F
2
FDIV[5:0]
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
Table
F
1
SEC[1:0]
13-3) as
F
0
435

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