MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 399

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 12
Serial Peripheral Interface (S12SPIV5)
12.1
The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status flags or the SPI operation can be interrupt driven.
12.1.1
12.1.2
The SPI includes these distinctive features:
12.1.3
The SPI functions in three modes: run, wait, and stop.
Freescale Semiconductor
Revision
Number
V05.00
Master mode and slave mode
Selectable 8 or 16-bit transfer width
Bidirectional mode
Slave select output
Mode fault error flag with CPU interrupt capability
Double-buffered data register
Serial clock with programmable polarity and phase
Control of SPI operation during wait mode
Introduction
Revision Date
Glossary of Terms
Features
Modes of Operation
24 Mar 2005
MOMI
MOSI
MISO
SISO
SCK
SPI
SS
12.3.2/12-403
Sections
Affected
Serial Peripheral Interface
Slave Select
Serial Clock
Master Output, Slave Input
Master Input, Slave Output
Master Output, Master Input
Slave Input, Slave Output
S12P-Family Reference Manual, Rev. 1.13
Table 12-1. Revision History
- Added 16-bit transfer width feature.
Description of Changes
399

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