MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 70

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MC9S12P32CFT

Manufacturer Part Number
MC9S12P32CFT
Description
MCU 16BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P32CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Package
48QFN EP
Family Name
HCS12
Maximum Speed
32 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
CAN/SCI/SPI
On-chip Adc
10-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1. Read: Always reads 0x00
1. Read: See individual bit descriptions below.
Port Integration Module (S12PPIMV1)
2.3.14
2.3.15
This register is reserved for factory testing of the PIM module and is not available in normal operation.
Writing to this register when in special modes can alter the pin functionality.
70
Address 0x001D
Address 0x001E
Write: Unimplemented
Write: See individual bit descriptions below.
IRQEN
IRQE
Field
Reset
Reset
7
6
W
W
R
R
IRQ select edge sensitive only—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 IRQ pin configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime IRQE=1
0 IRQ pin configured for low level recognition
IRQ enable—
Read or write anytime.
1 IRQ pin is connected to interrupt logic
0 IRQ pin is disconnected from interrupt logic
IRQE
IRQ Control Register (IRQCR)
PIM Reserved Register
and will be cleared only upon a reset or the servicing of the IRQ interrupt.
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
IRQEN
0
0
1
6
6
Table 2-13. IRQCR Register Field Descriptions
Figure 2-12. IRQ Control Register (IRQCR)
S12P-Family Reference Manual, Rev. 1.13
Figure 2-11. PIM Reserved Register
5
0
0
5
0
0
0
0
0
0
4
4
Description
0
0
0
0
3
3
0
0
0
0
2
2
Access: User read/write
Freescale Semiconductor
0
0
0
0
1
1
Access: User read
0
0
0
0
0
0
(1)
(1)

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