MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 52

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Signals in brackets denote alternative module routing pins.
2. Function active when RESET asserted.
Port Integration Module (S12PPIMV1)
2.3
This section provides a detailed description of all Port Integration Module registers.
2.3.1
Table 2-2
52
Port
Port
AD
A
B
M
P
J
Offset or
Address
0x0000
0x0001
0x0002
0x0003
Pin Name
PAD[9:0]
PP[4:0]
PJ[7:6]
PJ[2:0]
PM5
PM4
PM3
PM2
PM1
PM0
PP7
PP5
Memory Map and Register Definition
shows the register map of the Port Integration Module.
Memory Map
PORTA—Port A Data Register
PORTB—Port B Data Register
DDRA—Port A Data Direction Register
DDRB—Port B Data Direction Register
GPIO/KWP[4:0]
GPIO/KWJ[7:6]
GPIO/KWJ[2:0]
Pin Function
GPIO/KWP7
GPIO/KWP5
& Priority
PWM[4:0]
RXCAN
TXCAN
AN[9:0]
PWM5
GPIO
MOSI
GPIO
GPIO
MISO
GPIO
GPIO
GPIO
GPIO
SCK
SS
(1)
I/O
I/O Serial Peripheral Interface serial clock pin
I/O General purpose
I/O Serial Peripheral Interface master out/slave in pin
I/O General purpose
I/O Serial Peripheral Interface slave select output in master mode,
I/O General purpose
I/O Serial Peripheral Interface master in/slave out pin
I/O General purpose
I/O General purpose
I/O General purpose
I/O General purpose; with interrupt
I/O Pulse Width Modulator channel 5; emergency shut-down
I/O General purpose; with interrupt
I/O General purpose; with interrupt
I/O General purpose; with interrupt
I/O General purpose; with interrupt
I/O General purpose
S12P-Family Reference Manual, Rev. 1.13
O MSCAN transmit pin
O Pulse Width Modulator channel 4 - 0
I
I
Table 2-2. Block Memory Map
input in slave mode or master mode.
MSCAN receive
ATD analog
Register
Description
Access Reset Value
R/W
R/W
R/W
R/W
0x00
0x00
0x00
0x00
Freescale Semiconductor
Pin Function
Section/Page
after Reset
2.3.3/2-63
2.3.4/2-63
2.3.5/2-64
2.3.6/2-64
GPIO
GPIO
GPIO
GPIO