MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 252

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale’s Scalable Controller Area Network (S12MSCANV3)
8.1.1
8.1.2
252
Wake-Up Interrupt Req.
Transmit Interrupt Req.
Receive Interrupt Req.
Errors Interrupt Req.
Oscillator Clock
Glossary
Block Diagram
Bus Clock
oscillator clock
CAN clock
bus clock
CPU bus
CAN bus
FIFO
CAN
CRC
ACK
EOF
SOF
IFS
MSCAN
S12P-Family Reference Manual, Rev. 1.13
Acknowledge of CAN message
Controller Area Network
Cyclic Redundancy Code
End of Frame
First-In-First-Out Memory
Inter-Frame Sequence
Start of Frame
CPU related read/write data bus
CAN protocol related serial bus
Direct clock from external oscillator
CPU bus realated clock
CAN protocol related clock
MUX
Figure 8-1. MSCAN Block Diagram
Configuration
CANCLK
Table 8-2. Terminology
Registers
Control
Status
and
Presc.
Tq Clk
Wake-Up
Low Pass Filter
Message
Buffering
Receive/
Transmit
Filtering
Engine
and
Freescale Semiconductor
RXCAN
TXCAN