MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 324

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog-to-Digital Converter (ADC12B10C)
9.3.2.12.1
9.3.2.12.2
Table 9-21
result registers. Compare is always done using all 12 bits of both the conversion result and the compare
value in ATDDRn.
9.4
The ADC12B10C is structured into an analog sub-block and a digital sub-block.
324
Module Base +
0x0010 = ATDDR0, 0x0012 = ATDDR1, 0x0014 = ATDDR2, 0x0016 = ATDDR3
0x0018 = ATDDR4, 0x001A = ATDDR5, 0x001C = ATDDR6, 0x001E = ATDDR7
0x0020 = ATDDR8, 0x0022 = ATDDR9
Module Base +
0x0010 = ATDDR0, 0x0012 = ATDDR1, 0x0014 = ATDDR2, 0x0016 = ATDDR3
0x0018 = ATDDR4, 0x001A = ATDDR5, 0x001C = ATDDR6, 0x001E = ATDDR7
0x0020 = ATDDR8, 0x0022 = ATDDR9
Reset
Reset
W
W
R
R
Bit 11 Bit 10 Bit 9
Functional Description
15
15
0
0
0
shows how depending on the A/D resolution the conversion result is transferred to the ATD
= Unimplemented or Reserved
= Unimplemented or Reserved
Left Justified Result Data (DJM=0)
Right Justified Result Data (DJM=1)
14
14
0
0
0
Figure 9-15. Right justified ATD conversion result register (ATDDRn)
Figure 9-14. Left justified ATD conversion result register (ATDDRn)
13
13
0
0
0
Bit 8
Table 9-21. Conversion result mapping to ATDDRn
12
12
0
0
0
resolution
10-bit data
10-bit data
12-bit data
8-bit data
8-bit data
Bit 11 Bit 10 Bit 9
Bit 7
S12P-Family Reference Manual, Rev. 1.13
A/D
11
11
0
0
Bit 6
10
10
0
0
0
1
0
1
X
DJM
Bit 5
9
0
9
0
conversion result mapping to
Bit[11:4] = result, Bit[3:0]=0000
Bit[7:0] = result, Bit[11:8]=0000
Bit[11:2] = result, Bit[1:0]=00
Bit[9:0] = result, Bit[11:10]=00
Bit[11:0] = result
Bit 4
Bit 8
0
0
8
8
ATDDRn
Bit 3
Bit 7
0
0
7
7
Bit 2
Bit 6
0
0
6
6
Bit 1
Bit 5
5
0
5
0
Bit 0
Bit 4
0
0
4
4
Bit 3
0
0
0
3
3
Freescale Semiconductor
Bit 2
0
0
0
2
2
Bi1 1
0
0
0
1
1
Bit 0
0
0
0
0
0