MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 395

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.4.8
In loop operation the transmitter output goes to the receiver input. The RXD pin is disconnected from the
SCI.
Enable loop operation by setting the LOOPS bit and clearing the RSRC bit in SCI control register 1
(SCICR1). Setting the LOOPS bit disables the path from the RXD pin to the receiver. Clearing the RSRC
bit connects the transmitter output to the receiver input. Both the transmitter and receiver must be enabled
(TE = 1 and RE = 1).
11.5
11.5.1
See
11.5.2
11.5.2.1
Normal mode of operation.
To initialize a SCI transmission, see
11.5.2.2
SCI operation in wait mode depends on the state of the SCISWAI bit in the SCI control register 1
(SCICR1).
Freescale Semiconductor
•
•
Section 11.3.2, “Register
If SCISWAI is clear, the SCI operates normally when the CPU is in wait mode.
If SCISWAI is set, SCI clock generation ceases and the SCI module enters a power-conservation
state when the CPU is in wait mode. Setting SCISWAI does not affect the state of the receiver
enable bit, RE, or the transmitter enable bit, TE.
Initialization/Application Information
Loop Operation
Reset Initialization
Modes of Operation
Run Mode
Wait Mode
In single-wire operation data from the TXD pin is inverted if RXPOL is set.
In loop operation data from the transmitter is not recognized by the receiver
if RXPOL and TXPOL are not the same.
Figure 11-31. Loop Operation (LOOPS = 1, RSRC = 0)
Descriptions”.
S12P-Family Reference Manual, Rev. 1.13
Transmitter
Section 11.4.5.2, “Character
Receiver
NOTE
NOTE
Transmission”.
RXD
TXD
Serial Communication Interface (S12SCIV5)
395