MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 256

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale’s Scalable Controller Area Network (S12MSCANV3)
8.3.2
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
8.3.2.1
The CANCTL0 register provides various control bits of the MSCAN module as described below.
256
0x001C–0x001F
0x0018–0x001B
0x0010–0x0013
0x0014–0x0017
0x0020–0x002F
0x0030–0x003F
CANIDMR4–7
CANIDAR0–3
CANIDAR4–7
CANRXERR
CANTXERR
CANIDMRx
CANRXFG
CANTXFG
Register
0x000E
0x000F
Name
Register Descriptions
MSCAN Control Register 0 (CANCTL0)
R RXERR7
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
TXERR7
Bit 7
AM7
AM7
AC7
AC7
Figure 8-3. MSCAN Register Summary (continued)
= Unimplemented or Reserved
RXERR6
TXERR6
AM6
AM6
AC6
AC6
S12P-Family Reference Manual, Rev. 1.13
6
See
See
Section 8.3.3, “Programmer’s Model of Message
Section 8.3.3, “Programmer’s Model of Message
RXERR5
TXERR5
AM5
AM5
AC5
AC5
5
RXERR4
TXERR4
AM4
AM4
AC4
AC4
4
RXERR3
TXERR3
AM3
AM3
AC3
AC3
3
RXERR2
TXERR2
AM2
AM2
AC2
AC2
2
Storage”
Storage”
Freescale Semiconductor
RXERR1
TXERR1
AM1
AM1
AC1
AC1
1
RXERR0
TXERR0
Bit 0
AM0
AM0
AC0
AC0