MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 259

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.3.2.2
The CANCTL1 register provides various control bits and handshake status information of the MSCAN
module as described below.
1. Read: Anytime
Freescale Semiconductor
Module Base + 0x0001
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1); CANE is write once
CLKSRC
LISTEN
LOOPB
BORM
CANE
Field
7
6
5
4
3
Reset:
W
R
MSCAN Enable
0 MSCAN module is disabled
1 MSCAN module is enabled
MSCAN Clock Source — This bit defines the clock source for the MSCAN module (only for systems with a clock
generation module;
0 MSCAN clock source is the oscillator clock
1 MSCAN clock source is the bus clock
Loopback Self Test Mode — When this bit is set, the MSCAN performs an internal loopback which can be used
for self test operation. The bit stream output of the transmitter is fed back to the receiver internally. The RXCAN
input is ignored and the TXCAN output goes to the recessive state (logic 1). The MSCAN behaves as it does
normally when transmitting and treats its own transmitted message as a message received from a remote node.
In this state, the MSCAN ignores the bit sent during the ACK slot in the CAN frame acknowledge field to ensure
proper reception of its own message. Both transmit and receive interrupts are generated.
0 Loopback self test disabled
1 Loopback self test enabled
Listen Only Mode — This bit configures the MSCAN as a CAN bus monitor. When LISTEN is set, all valid CAN
messages with matching ID are received, but no acknowledgement or error frames are sent out (see
Section 8.4.4.4, “Listen-Only
applications which require “hot plugging” or throughput analysis. The MSCAN is unable to transmit any
messages when listen only mode is active.
0 Normal operation
1 Listen only mode activated
Bus-Off Recovery Mode — This bits configures the bus-off state recovery mode of the MSCAN. Refer to
Section 8.5.2, “Bus-Off
0 Automatic bus-off recovery (see Bosch CAN 2.0A/B protocol specification)
1 Bus-off recovery upon user request
MSCAN Control Register 1 (CANCTL1)
CANE
0
7
= Unimplemented
CLKSRC
Figure 8-5. MSCAN Control Register 1 (CANCTL1)
0
6
Table 8-4. CANCTL1 Register Field Descriptions
Section 8.4.3.2, “Clock
Recovery,” for details.
S12P-Family Reference Manual, Rev. 1.13
Mode”). In addition, the error counters are frozen. Listen only mode supports
LOOPB
0
5
System,” and
LISTEN
1
4
Description
Freescale’s Scalable Controller Area Network (S12MSCANV3)
Section Figure 8-43., “MSCAN Clocking
BORM
3
0
WUPM
0
2
Access: User read/write
SLPAK
0
1
Scheme,”).
INITAK
1
0
259
(1)