MC9S12P32CFT Freescale Semiconductor, MC9S12P32CFT Datasheet - Page 521

• Manufacturer Part Number: MC9S12P32CFT
• Description: MCU 16BIT 32K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P32CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Package: 48QFN EP
• Family Name: HCS12
• Maximum Speed: 32 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/SCI/SPI
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A.3.1.13
The maximum set field margin level time is given by:
A.3.1.14
The time required to Erase Verify D-Flash for a given number of words N
A.3.1.15
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary since programming across a row boundary requires extra steps. The D-
Flash programming time is specified for different cases: 1,2,3,4 words and 4 words across a row boundary.
The typical D-Flash programming time is given by the following equation, where N
of words; BC=0 if no row boundary is crossed and BC=1 if a row boundary is crossed:
The maximum D-Flash programming time is given by:
A.3.1.16
Typical D-Flash sector erase times, expected on a new device where no margin verify fails occur, is given
by:
Maximum D-Flash sector erase times is given by:
Freescale Semiconductor
t
t
=
t
dcheck
t
dera
dera
350
≈
≈
≈
t
t
⋅
5025
20100
dpgm
dpgm
-------------------- -
f
(
NVMBUS
Set Field Margin Level (FCMD=0x0E)
Erase Verify D-Flash Section (FCMD=0x10)
Program D-Flash (FCMD=0x11)
Erase D-Flash Sector (FCMD=0x12)
450
1
⋅
≈
≈
+
------------------ -
f
⋅
⎛
⎝
⎛
⎝
NVMOP
------------------ -
f
N
(
(
NVMOP
14
14
1
W
1
)
+
+
⋅
(
(
-------------------- -
f
+
54 N
54 N
NVMBUS
+
700
⋅
⋅
3400
1
⋅
W
W
-------------------- -
f
)
)
NVMBUS
⋅
+
+
-------------------- -
f
NVMBUS
1
S12P-Family Reference Manual, Rev. 1.13
(
(
14 BC
14 BC
1
⋅
⋅
) )
) )
⋅
⋅
------------------ -
f
------------------ -
f
NVMOP
NVMOP
1
1
⎞
⎠
⎞
⎠
+
+
⎛
⎝
⎛
⎝
(
(
500
500
+
+
(
(
525 N
750
⋅
⋅
N
W
W
)
)
+
+
W
(
(
100 BC
100 BC
is given by:
⋅
⋅
)
)
W
)
)
⋅
⋅
Electrical Characteristics
denotes the number
-------------------- -
f
-------------------- -
f
NVMBUS
NVMBUS
1
1
⎞
⎠
⎞
⎠
521