DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 908

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Section 19 ROM
19.24.2 User Program Mode
When set to user program mode, the chip can program and erase its flash memory by executing a
user program/erase control program. Therefore, on-board programming of the on-chip flash
memory can be carried out by providing ahead of time an on-board FWE control means to supply
programming data, and storing a program/erase control program in part of the program area if
necessary.
To select user program mode, select a mode that enables the on-chip flash memory (mode 6 or 7)
and apply a high level to the FWE pin. In this mode, on-chip supporting modules other than flash
memory operate as they normally would in modes 6 and 7.
While the SWE1 bit is set to 1 to perform programming or erasing for the addresses H'000000 to
H'03FFFF, this address area cannot be read. While the SWE2 bit is set to 1 to perform
programming or erasing for the addresses H'040000 to H'07FFFF, this address area cannot be
read. The control program that performs programming and erasing should be run in on-chip RAM
or flash memory except for the above address areas. When the program is located in external
memory, an instruction for programming the flash memory and the following instruction should
be located in on-chip RAM.
Figure 19.70 shows the procedure for executing the program/erase control program when
transferred to on-chip RAM.
Rev.6.00 Sep. 27, 2007 Page 876 of 1268
REJ09B0220-0600