DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 260

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 7 DMA Controller (Not Supported in the H8S/2321)
Bit 5—Repeat Enable (RPE): Used in combination with the DTIE bit in DMABCR to select the
mode (sequential, idle, or repeat) in which transfer is to be performed.
Bit 5
RPE
0
1
For details of operation in sequential, idle, and repeat mode, see section 7.5.2, Sequential Mode,
section 7.5.3, Idle Mode, and section 7.5.4, Repeat Mode.
Bit 4—Data Transfer Direction (DTDIR): Used in combination with the SAE bit in DMABCR
to specify the data transfer direction (source or destination). The function of this bit is therefore
different in dual address mode and single address mode.
DMABCR
SAE
0
1
Rev.6.00 Sep. 27, 2007 Page 228 of 1268
REJ09B0220-0600
DMABCR
DTIE
0
1
0
1
Bit 4
DTDIR
0
1
0
1
Description
Transfer in sequential mode (no transfer end interrupt)
Transfer in sequential mode (with transfer end interrupt)
Transfer in repeat mode (no transfer end interrupt)
Transfer in idle mode (with transfer end interrupt)
Description
Transfer with MAR as source address and IOAR as destination
address
Transfer with IOAR as source address and MAR as destination address
Transfer with MAR as source address and DACK pin as write strobe
Transfer with DACK pin as read strobe and MAR as destination address
(Initial value)
(Initial value)

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