DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 1249

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

TSR2—Timer Status Register 2
Bit
Initial value
Read/Write
Note:
*
Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
—
—
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
Overflow Flag
R/(W)*
TCFV
0
1
4
0
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
—
—
3
0
—
—
2
0
Input Capture/Output Compare Flag B
0
1
Rev.6.00 Sep. 27, 2007 Page 1217 of 1268
H'FFF5
R/(W)*
TGFB
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
1
0
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
TGFB = 1
Note: 1. The DMAC is not supported in the H8S/2321.
Input Capture/Output Compare Flag A
0
1
R/(W)*
TGFA
0
0
Appendix B Internal I/O Registers
[Clearing conditions]
• When DTC is activated by TGIA interrupt
• When DMAC
• When 0 is written to TGFA after reading
[Setting conditions]
• When TCNT = TGRA while TGRA is
• When TCNT value is transferred to TGRA by
while DISEL bit of MRB in DTC is 0
while DTA bit of DMABCR in DMAC
TGFA = 1
functioning as output compare register
input capture signal while TGRA is functioning
as input capture register
*1
is activated by TGIA interrupt
REJ09B0220-0600
*1
is 1
TPU2