DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 415

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Port 5 Data Register (P5DR)
P5DR is an 8-bit readable/writable register that stores output data for the port 5 pins (P5
Bits 7 to 4 are reserved; they return an undefined value if read, and cannot be modified.
P5DR is initialized to H'0 (bits 3 to 0) by a reset, and in hardware standby mode. It retains its prior
state in software standby mode.
Port 5 Register (PORT5)
Note: * Determined by state of pins P5
PORT5 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port 5 pins (P5
Bits 7 to 4 are reserved; they return an undefined value if read, and cannot be modified.
If a port 5 read is performed while P5DDR bits are set to 1, the P5DR values are read. If a port 5
read is performed while P5DDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORT5 contents are determined by the pin states, as
P5DDR and P5DR are initialized. PORT5 retains its prior state in software standby mode.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
Undefined Undefined Undefined Undefined
Undefined Undefined Undefined Undefined
—
—
—
—
7
7
—
—
—
—
6
6
3
to P5
3
to P5
0
—
—
—
—
) must always be performed on P5DR.
5
5
0
.
—
—
—
—
4
4
Rev.6.00 Sep. 27, 2007 Page 383 of 1268
P53DR
R/W
P53
— *
R
3
0
3
P52DR
R/W
P52
— *
R
2
0
2
Section 9 I/O Ports
REJ09B0220-0600
P51DR
R/W
P51
— *
R
0
1
1
3
to P5
P50DR
R/W
P50
— *
R
0
0
0
0
).