DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 678

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 Serial Communication Interface (SCI)
Figure 14.13 shows an example of SCI operation for multiprocessor format reception.
Rev.6.00 Sep. 27, 2007 Page 646 of 1268
REJ09B0220-0600
MPIE
RDRF
RDR
value
MPIE
RDRF
RDR
value
1
1
Start
bit
Start
bit
0
0
MPIE = 0
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)
MPIE = 0
D0
D0
ID1
Figure 14.13 Example of SCI Receive Operation
D1
D1
RXI interrupt
request
(multiprocessor
interrupt)
generated
Data (ID2)
Data (ID1)
RXI interrupt
request
(multiprocessor
interrupt)
generated
D7
D7
(b) Data matches station's ID
MPB
MPB
(a) Data does not match station's ID
1
1
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
handling routine
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
handling routine
Stop
bit
Stop
bit
1
1
Start
bit
Start
bit
0
0
D0
D0
If not this station's ID,
MPIE bit is set to 1
again
Matches this station's ID,
so reception continues, and
data is received in RXI
interrupt handling routine
D1
D1
Data (Data2)
Data (Data1)
ID1
ID2
D7
D7
MPB
MPB
RXI interrupt request is
not generated, and RDR
retains its state
0
0
Stop
bit
Stop
bit
MPIE bit set to 1
again
1
1
Idle state
(mark state)
Idle state
(mark state)
1
1
Data2

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