DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 484

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Timer Pulse Unit (TPU)
Bits 4 and 3—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select the input clock edge.
When the input clock is counted using both edges, the input clock period is halved (e.g. φ/4 both
edges = φ/2 rising edge). If phase counting mode is used on channels 1, 2, 4, and 5, this setting is
ignored and the phase counting mode setting has priority.
Bit 4
CKEG1
0
1
Note: Internal clock edge selection is valid when the input clock is φ/4 or slower. This setting is
Bits 2 to 0—Time Prescaler 2 to 0 (TPSC2 to TPSC0): These bits select the TCNT counter
clock. The clock source can be selected independently for each channel. Table 10.4 shows the
clock sources that can be set for each channel.
Table 10.4 TPU Clock Sources
Channel φ/1
0
1
2
3
4
5
Legend:
o
Blank: No setting
Rev.6.00 Sep. 27, 2007 Page 452 of 1268
REJ09B0220-0600
:
ignored if the input clock is φ/1, or when overflow/underflow of another channel is selected.
Setting
Internal Clock
o
o
o
o
o
o
Bit 3
CKEG0
0
1
φ/4
o
o
o
o
o
o
φ/16 φ/64 φ/256 φ/1024 φ/4096
o
o
o
o
o
o
Description
Count at rising edge
Count at falling edge
Count at both edges
o
o
o
o
o
o
o
o
o
o
o
o
o
TCLKA TCLKB TCLKC TCLKD
o
o
o
o
o
o
o
o
o
External Clock
o
o
o
o
o
o
(Initial value)
Overflow/
Underflow
on Another
Channel
o
o

Related parts for DF2328BVF25V