DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 249

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

7.1
The chip has a built-in DMA controller * (DMAC) which can carry out data transfer on up to 4
channels.
Note: * The DMAC is not supported in the H8S/2321.
7.1.1
The features of the DMAC are listed below.
• Choice of short address mode or full address mode
• 16-Mbyte address space can be specified directly
• Byte or word can be set as the transfer unit
• Activation sources: internal interrupt, external request, auto-request (depending on transfer
Short address mode
⎯ Maximum of 4 channels can be used
⎯ Choice of dual address mode or single address mode
⎯ In dual address mode, one of the two addresses, transfer source and transfer destination, is
⎯ In single address mode, transfer source or transfer destination address only is specified as
⎯ In single address mode, transfer can be performed in one bus cycle
⎯ Choice of sequential mode, idle mode, or repeat mode for dual address mode and single
Full address mode
⎯ Maximum of 2 channels can be used
⎯ Transfer source and transfer destination address specified as 24 bits
⎯ Choice of normal mode or block transfer mode
mode)
⎯ Six 16-bit timer-pulse unit (TPU) compare match/input capture interrupts
⎯ Serial communication interface (SCI0, SCI1) transmission data empty interrupt, reception
⎯ A/D converter conversion end interrupt
specified as 24 bits and the other as 16 bits
24 bits
address mode
data full interrupt
Overview
Features
(Not Supported in the H8S/2321)
Section 7 DMA Controller
Section 7 DMA Controller (Not Supported in the H8S/2321)
Rev.6.00 Sep. 27, 2007 Page 217 of 1268
REJ09B0220-0600