DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 257

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.2.2
IOAR is a 16-bit readable/writable register that specifies the lower 16 bits of the transfer source
address or destination address. The upper 8 bits of the transfer address are automatically set to
H'FF.
Whether IOAR functions as the source address register or as the destination address register can
be selected by means of the DTDIR bit in DMACR.
IOAR is invalid in single address mode.
IOAR is not incremented or decremented each time a transfer is executed, so the address specified
by IOAR is fixed.
IOAR is not initialized by a reset or in standby mode.
7.2.3
ETCR is a 16-bit readable/writable register that specifies the number of transfers. The setting of
this register is different for sequential mode and idle mode on the one hand, and for repeat mode
on the other.
Sequential Mode and Idle Mode
Bit
IOAR
Initial value :
R/W
Transfer Counter (ETCR)
Bit
Initial value :
R/W
I/O Address Register (IOAR)
Execute Transfer Count Register (ETCR)
:
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15
15
*
*
14
14
*
*
13
13
*
*
12
12
*
*
11
11
Section 7 DMA Controller (Not Supported in the H8S/2321)
*
*
10
10
*
*
9
9
*
*
8
8
*
*
Rev.6.00 Sep. 27, 2007 Page 225 of 1268
7
7
*
*
6
6
*
*
5
5
*
*
4
4
*
*
REJ09B0220-0600
3
3
*
*
2
*
2
*
*: Undefined
*: Undefined
1
1
*
*
0
0
*
*

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