DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 1010
DF2328BVF25V
Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of DF2328BVF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 22 Electrical Characteristics
Notes: 1. Follow the program/erase algorithms when making the time settings.
22.3
Although both the F-ZTAT and mask ROM versions fully meet the electrical specifications listed
in this manual, there may be differences in the actual values of the electrical characteristics,
operating margins, noise margins, and so forth, due to differences in the fabrication process, the
on-chip ROM, and the layout patterns.
If the F-ZTAT version is used to carry out system evaluation and testing, therefore, when
switching to the mask ROM version the same evaluation and testing procedures should also be
conducted on this version.
Rev.6.00 Sep. 27, 2007 Page 978 of 1268
REJ09B0220-0600
2. Programming time per 128 bytes. (In the H8S/2329B and H8S/2328B, indicates the
3. Time to erase one block. (In the H8S/2329B and H8S/2328B, indicates the time during
4. Maximum programming time
5. The maximum number of writes (N) should be set as shown below according to the
6. For the maximum erase time (t
7. The minimum number of rewrites after which all characteristics are guaranteed. (The
8. Reference value at 25°C. (This is a general indication of the number of rewrites
9. The data retention characteristics within the specified range, including min. rewrites.
Usage Note
total time during which the P bit is set in flash memory control register 1 (FLMCR1). In
the H8S/2326, indicates the total time during which the P1 bit and P2 bit in flash
memory control registers 1 and 2 (FLMCR1, FLMCR2) are set. Does not include the
program-verify time.)
which the E bit is set in FLMCR1. In the H8S/2326, indicates the total time during which
the E1 bit in FLMCR1 and the E2 bit in FLMCR are set. Does not include the erase-
verify time.)
actual set value of z so as not to exceed the maximum programming time (t
The wait time after P bit setting (z) should be changed as follows according to the
number of writes (n).
Number of writes (n)
wait time after E bit setting (z) and the maximum number of erases (N):
guaranteed range is one to min. rewrites.)
possible under normal conditions.)
t
1 ≤ n ≤ 6
7 ≤ n ≤ 1000
1 ≤ n ≤ 6
t
P
E
(max) = Wait time after E bit setting (z) × maximum number of erases (N)
(max) =
i=1
Σ
N
wait time after P bit setting (z)
z = 30 μs
z = 200 μs
z = 10 μs: For additional writing
E
(max)), the following relationship applies between the
P
(max)).
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