DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 1297

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Port Name
Pin Name
PG
Legend:
H:
L:
T:
kept:
DDR:
OPE:
WAITE:
WAITPS:
BRLE:
BREQOE: BREQO pin enable
BREQOPS: BREQO pin select
DRAME:
LCASE:
AnE:
A20E:
ASOD:
CS167E:
CS25E:
LWROD:
Notes: 1. LCAS is not supported in the H8S/2321.
0
/CAS
2. As the DRAM interface is not supported in the H8S/2321, LCASE is always 0.
3. CAS is not supported in the H8S/2321.
4. As the DRAM interface is not supported in the H8S/2321, DRAME is always 0.
5. The WDTOVF pin function is not usable on the F-ZTAT version.
6. A low level is output if a WDT overflow occurs while WT/IT is set to 1.
*
3
MCU
Operating
Mode
4 to 6
7
High level
Low level
High impedance
Input port becomes high-impedance, output port retains state
Data direction register
Output port enable
Wait input enable
WAIT pin select
Bus release enable
DRAM space setting
Address n enable (n = 23 to 21)
Address 20 enable
AS output disable
CS167 enable
CS25 enable
LWR output disable
DRAM space setting, 16-bit access setting
Reset
T
T
Hardware
Standby
Mode
T
T
Software
Standby Mode
[DRAME
kept
[DRAME
OPE = 1]
T
[DRAME
OPE = 1]
CAS
kept
*
3
*
*
*
4
4
4
= 0]
·
·
Rev.6.00 Sep. 27, 2007 Page 1265 of 1268
Bus-Released
State
T
kept
Appendix D Pin States
REJ09B0220-0600
Program
Execution State
Sleep Mode
[DRAME
Input port
[DRAME
CAS
I/O port
*
3
*
*
4
4
= 0]
= 1]