DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 1234

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Appendix B Internal I/O Registers
TIOR0H—Timer I/O Control Register 0H
Rev.6.00 Sep. 27, 2007 Page 1202 of 1268
REJ09B0220-0600
Bit
Initial value
Read/Write
Note: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000, and φ/1 is used as
TGR0B I/O Control
0
1
0
1
0
1
:
:
:
the TCNT1 count clock, this setting is invalid and input capture does not occur.
0
1
0
1
0
1
*
IOB3
R/W
7
0
0
1
0
1
0
1
0
1
0
1
*
*
TGR0B
is output
compare
register
TGR0B
is input
capture
register
IOB2
R/W
6
0
Output disabled
Initial output is
0 output
Output disabled
Initial output is
0 output
Capture input
source is
TIOCB
Capture input
source is channel
1/count clock
IOB1
R/W
5
0
0
pin
IOB0
R/W
4
0
TGR0A I/O Control
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down*
0
1
0
1
0
1
IOA3
R/W
3
0
0
1
0
1
0
1
*
1
0
1
0
1
0
1
0
1
0
1
*
*
IOA2
R/W
TGR0A
is output
compare
register
TGR0A
is input
capture
register
2
0
H'FFD2
* : Don’t care
IOA1
R/W
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCA
Capture input
source is channel
1/count clock
1
0
0
pin
IOA0
R/W
0
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
* : Don’t care
TPU0